PERFORMANCE IMPLICATIONS OF SYNCHRONIZATION SUPPORT FOR PARALLEL FORTRAN PROGRAMS

This paper studies the performance implications of architectural synch ronization support for automatically parallelized numerical programs. As the basis for this work, we analyze the needs for synchronization i n automatically parallelized numerical programs. The needs are due to task scheduling, iteration scheduling, barriers, and data dependence h andling. We present synchronization algorithms for efficient execution of programs with nested parallel loops. Next, we identify how various hardware synchronization support can be used to satisfy these softwar e synchronization needs. The synchronization primitives studied are te st&set, fetch&add, and exchange-byte operations. In addition to these, synchronization bus implementation of lock/unlock and fetch&add opera tions are also considered. Finally, we ran experiments to quantify the impact of various architectural support on the performance of a bus-b ased shared memory multiprocessor running automatically parallelized n umerical programs. We found that supporting an atomic fetch&add primit ive in shared memory is as effective as supporting lock/unlock operati ons with a synchronization bus. Both achieve substantial performance i mprovement over the cases where atomic test&set and exchange-byte oper ations are supported in shared memory. (C) 1994 Academic Press, Inc.