A planar twin polysilicon thin film transistor (TFT) EEPROM cell fabri
cated with a simple low temperature (less-than-or-equal-to 600-degrees
-C) process is demonstrated in this work. The gate electrodes of the t
wo TFT's are connected to form the floating gate of the cell, while th
e source and drain of the larger TFT are connected to form the control
gate. The cell is programmed and erased by Fowler-Nordheim tunneling.
The threshold voltage of the cell can be shifted by as much as 8 V af
ter programming. This new EEPROM cell can dramatically reduce the cost
of production by reducing manufacturing complexity.