8GBIT S CMOS INTERFACE FOR PARALLEL FIBEROPTIC INTERCONNECTS/

Citation
B. Sano et al., 8GBIT S CMOS INTERFACE FOR PARALLEL FIBEROPTIC INTERCONNECTS/, Electronics Letters, 32(24), 1996, pp. 2262-2263
Citations number
4
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
ISSN journal
00135194
Volume
32
Issue
24
Year of publication
1996
Pages
2262 - 2263
Database
ISI
SICI code
0013-5194(1996)32:24<2262:8SCIFP>2.0.ZU;2-K
Abstract
The authors demonstrate an 8 Gbit/s CMOS link interface designed for u se with parallel fibre-optic interconnect technology. The link interfa ce is implemented in 0.8 mu m CMOS and consists of eight data channels and one frame control channel each operating at 1 Gbit/s along with a full-speed 1 GHz clock channel. The chip also provides dual-ported FI FO buffers for interface to a host computer.