EXACT CALCULATION OF SYNCHRONIZING SEQUENCES BASED ON BINARY DECISIONDIAGRAMS

Citation
C. Pixley et al., EXACT CALCULATION OF SYNCHRONIZING SEQUENCES BASED ON BINARY DECISIONDIAGRAMS, IEEE transactions on computer-aided design of integrated circuits and systems, 13(8), 1994, pp. 1024-1034
Citations number
25
Categorie Soggetti
Computer Application, Chemistry & Engineering","Computer Science Hardware & Architecture
ISSN journal
02780070
Volume
13
Issue
8
Year of publication
1994
Pages
1024 - 1034
Database
ISI
SICI code
0278-0070(1994)13:8<1024:ECOSSB>2.0.ZU;2-C
Abstract
In order to reliably predict the behavior of a finite state machine (F SM) M or to generate acceptance tests for sequential designs, it is ne cessary to drive M to a predictable state or set of states. One possib le way to accomplish this is to have a special reset circuit to force all the latches to a specific state. However, if the circuit can be dr iven to a predictable state by applying an input sequence, the area re quired for reset circuitry can be saved. A synchronizing sequence for an FSM M is an input sequence which, when applied to any initial state of M, will drive M to a single specific state, called a reset state. An efficient and exact method for computing synchronizing sequences ba sed on the efficient image and pre-image computation methods using bin ary decision diagrams is presented. The method is exact in the sense t hat it is a decision procedure: Given enough time and memory, the meth od can compute a synchronizing sequence if has one; otherwise, the met hod says that M is not resettable. The theoretical heart of the propos ed method is Universal Alignment, which is an analysis of the product of an FSM with itself. Algorithms and their related theorems are prese nted to perform the following: decide whether M has a synchronizing se quence (i.e., M is resettable). calculate a synchronizing sequence for M. calculate the set of all reset states. decide whether a specific s tate is a reset state. New results on the resettability of some benchm ark circuits are reported.