AN OBSERVABILITY ENHANCEMENT APPROACH FOR IMPROVED TESTABILITY AND AT-SPEED TEST

Some recent studies show that an at-speed sequential or functional tes t is better than a test executed at lower speed. Design-for-testabilit y approaches based on full scan, partial scan or silicon-based solutio ns such as Crosscheck achieve very high stuck-at fault coverage. Howev er, in all these cases, the tests have to be applied at speeds lower t han the operation speed of the circuit. In this paper, a design-for-te st method that permits at-speed testing is introduced. The method is b ased on probe point insertion for improved observability, and it requi res enhancements to an existing sequential circuit fault simulator. Fa ults that can be activated but not detected at existing primary output s are targeted. A minimal set of probe points is selected to detect th ese faults, and the probe points are compressed to one or two output p ins using exclusive-OR trees. The issue of aliasing of fault effects i s addressed. Improvements in fault coverage were made for all 17 of th e ISCAS89 sequential benchmark circuits studied. Fault coverages betwe en 99% and 100% were obtained for seven circuits, and 100% ATG effecti veness was achieved on all but two circuits.