LOW-PASS FILTER FOR COMPUTING THE TRANSITION DENSITY IN DIGITAL CIRCUITS

Estimating the power dissipation and the reliability of integrated cir cuits is a major concern of the semiconductor industry. Previously [1] , we showed that a good measure of power dissipation and reliability i s the extent of circuit switching activity, called the transition dens ity. However, the algorithm for computing the density in [1] is very b asic and does not take into account the effect of inertial delays of l ogic gates. Thus, as we will show in this paper, the transition densit y may be severely overestimated in high-frequency applications. To ove rcome this problem, we model the effect of gate delay on logic signals in the form of a conceptual low-pass filter module that does not allo w unacceptably short logic pulses to propagate. Using a stochastic mod el of logic signals, we then derive the equations required to propagat e the transition density through the filter. We will present experimen tal results that illustrate the validity and importance of these resul ts.