DEEP-SUBMICRON FIELD ISOLATION WITH BURIED INSULATOR BETWEEN POLYSILICON ELECTRODES (BIPS)

Citation
M. Shimizu et al., DEEP-SUBMICRON FIELD ISOLATION WITH BURIED INSULATOR BETWEEN POLYSILICON ELECTRODES (BIPS), IEICE transactions on electronics, E77C(8), 1994, pp. 1369-1376
Citations number
NO
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
09168524
Volume
E77C
Issue
8
Year of publication
1994
Pages
1369 - 1376
Database
ISI
SICI code
0916-8524(1994)E77C:8<1369:DFIWBI>2.0.ZU;2-0
Abstract
A novel isolation structure which has a buried insulator between polys ilicon electrodes (BIPS) has been developed. The BIPS isolation employ s the refilling CVD-oxides in openings between polysilicon electrodes by photoresist etchback process. Device characteristics and parasitic effects of BIPS isolation have been compared with that of LOCOS isolat ion. Using BIPS isolation, we can almost suppress the narrow-channel e ffects and achieve the deep submicron isolation. No degradation on the subthreshold decay of devices with BIPS isolation can be obtained. Th e use of BIPS isolation technology yields a DRAM cell of small area. T he successful fabrication of deep submicron devices with BIPS isolatio n clearly demonstrates that this technology has superior ability to ov ercome the LOCOS isolation.