MINIMAL IC PRETEST REQUIREMENTS FOR MULTICHIP MODULES

Authors
Citation
W. Daum et We. Burdick, MINIMAL IC PRETEST REQUIREMENTS FOR MULTICHIP MODULES, IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging, 17(3), 1994, pp. 277-282
Citations number
8
Categorie Soggetti
Engineering, Eletrical & Electronic","Engineering, Manufacturing","Material Science
ISSN journal
10709894
Volume
17
Issue
3
Year of publication
1994
Pages
277 - 282
Database
ISI
SICI code
1070-9894(1994)17:3<277:MIPRFM>2.0.ZU;2-6
Abstract
The GE Corporate Research and Development Center in Schenectady, NY, h as developed an innovative multichip module (MCM) technology-high-dens ity interconnect (HDI)-that provides a high performance solution to pa ckaging and interconnection needs. To address commercial markets, a lo w-cost solution for MCMs has to be found. This paper presents an appro ach to reduce the IC pretest cost to a minimum in the absence of indus try accepted ''known good die.'' The IC pretest method presented is ba sed on the assumption that adequate testing is being performed by the component manufacturer and that a relevant subset of tests can screen for component defects occurring after wafer test. This approach differ entiates between device complexities, their quantity, and function in the digital MCM. Using this methodology, in the absence of a fully dev eloped KGD enviromment, IC pretest is a requirement for MCM prototype quantities and small production runs. Validation data for the test met hodology is presented together with a discussion of the respective lim itations and drawbacks.