Lt. Su et al., OPTIMIZATION OF SERIES RESISTANCE IN SUB-0.2 MU-M SOI MOSFETS (VOL 15, PG 145, 1994), IEEE electron device letters, 15(9), 1994, pp. 363-365
The optimization of device series resistance in ultrathin film SOI dev
ices is studied through 2-D simulations and process experiments. The s
eries resistance is dependent on the contact resistivity of the silici
de to silicon and the silicide geometry. To achieve low series resista
nce, very thin silicides that do not fully consume the SOI film are ne
eded. A novel cobalt salicidation technology using titanium/cobalt lam
inates is used to demonstrate sub-0.2 mum, thin-film SOI devices with
excellent performance and very low device series resistance.