AN ANALOG MEMORY INTEGRATED-CIRCUITS FOR WAVE-FORM SAMPLING UP TO 900MHZ

The design and implementation of a switched-capacitor memory suitable for capturing high-speed analog waveforms is described. Highlights of the presented circuit are a 900 MHz sampling frequency (generated on c hip), input signal independent cell pedestals and sampling instances, and cell gains that are insensitive to component sizes. A two-channel version of the memory with 32 cells for each channel has been integrat ed in a 2-mum complementary metal oxide semiconductor (CMOS) process w ith polysilicon-to-polysilicon capacitors. The measured rms cell respo nse variation in a channel after cell pedestal subtraction is less tha n 0.3 mV across the full input signal range. The cell-to-cell gain mat ching is better than 0.01% rms, and the nonlinearity is less than 0.03 % for a 2.5-V input range. The dynamic range of the memory exceeds 13 bits, and the peak signal-to-(noise+distortion) ratio for a 21.4 MHz s ine wave sampled at 900 MHz is 59 dB.