PREDICTING HARMONIC DISTORTION IN SWITCHED-CURRENT MEMORY-CIRCUITS

Citation
Pj. Crawley et Gw. Roberts, PREDICTING HARMONIC DISTORTION IN SWITCHED-CURRENT MEMORY-CIRCUITS, IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 41(2), 1994, pp. 73-86
Citations number
10
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
10577130
Volume
41
Issue
2
Year of publication
1994
Pages
73 - 86
Database
ISI
SICI code
1057-7130(1994)41:2<73:PHDISM>2.0.ZU;2-4
Abstract
The switched-current (SI) technique has recently been proposed as a ch eaper alternative to the switched-capacitor (SC) technique. This stems largely from the fact that the analog signal processing functions per formed by a SC circuit using linear capacitors and MOS transistors can be replaced by a SI circuit consisting solely of MOS transistors. At this time, most of the SI circuit design techniques and analysis have dealt strictly with the linear behavior of SI circuits. But, since SI circuits use only MOS transistors to perform linear processing, it see ms apparent to ask the question: How linear are SI circuits? In this p aper we shall identify a major source of distortion in SI memory circu its and derive an explicit formula that bounds the Total Harmonic Dist ortion (THD) that results from this source of distortion. Also, the fr equency range over which this type of distortion dominates will be dis cussed. Both simulation and experimental results verify the proposed t heory.