ELECTRICAL STRESSING OF SUBMICROMETER MOSFETS WITH RAISED SOURCE DRAIN STRUCTURES REALIZED BY SELECTIVE EPITAXIAL-GROWTH OF SILICON USING SILANE ONLY/

Submicrometre CMOS devices with raised source and drain (RSD) structur es, realised by selective epitaxial growth (SEG) of silicon in silane have been electrically stressed. These devices were less susceptible t o hot carrier degradation than their conventional counterparts, due to graded source and drain junctions.