THE PERSPECTIVES OF SILICON-ON-INSULATOR TECHNOLOGIES FOR CRYOGENIC APPLICATIONS

The potential and restrictions of cryogenic SOI technologies are revie wed. First the low temperature device operation, illustrated by extens ive experimental data covering a broad temperature range down to liqui d helium, is discussed in order to validate the theoretical models. At tention is given to the kink phenomenon, transient and hysteresis effe cts, the device breakdown and latch-up behavior, and the noise perform ance. Several design methodologies and technological modifications for eliminating the cryogenic artifacts are critically discussed. Alterna tive device concepts such as the twin-transistor structure and the gat e-all-around concept are also addressed. Finally some considerations f or digital and analog circuit applications are given in view of the fu ture perspectives of cryogenic SOI CMOS technologies.