SWITCHED-CAPACITOR FILTERS DRIVEN WITH VERY-LOW VOLTAGE CLOCK SIGNALS

Authors
STEYAERT M CROLS J
Citation
M. Steyaert et J. Crols, SWITCHED-CAPACITOR FILTERS DRIVEN WITH VERY-LOW VOLTAGE CLOCK SIGNALS, Electronics Letters, 29(24), 1993, pp. 2092-2093
Citations number
5
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Electronics Letters → ACNP
ISSN journal
00135194
Volume
29
Issue
24
Year of publication
1993
Pages
2092 - 2093
Database
ISI
SICI code
0013-5194(1993)29:24<2092:SFDWVV>2.0.ZU;2-Y
Abstract
It is well known that the switches of a very low voltage (1.5V) switch ed-capacitor filter in a standard CMOS process must be driven with a c lock signal higher than the power supply, often generated on-chip. The Letter presents however a technique to implement very low voltage swi tched-capacitor filters with switches driven at the same very low volt ages.