3-DIMENSIONAL CMOS NAND WITH 3 STACKED CHANNELS

Citation
G. Roos et B. Hoefflinger, 3-DIMENSIONAL CMOS NAND WITH 3 STACKED CHANNELS, Electronics Letters, 29(24), 1993, pp. 2103-2104
Citations number
3
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
ISSN journal
00135194
Volume
29
Issue
24
Year of publication
1993
Pages
2103 - 2104
Database
ISI
SICI code
0013-5194(1993)29:24<2103:3CNW3S>2.0.ZU;2-9
Abstract
A process-inherent NAND2 device is presented for a three-dimensional C MOS integration with epitaxial lateral overgrowth and chemo-mechanical polishing. The required 'OR' function of the two pMOS transistors is achieved by one silicon volume, which is controlled by a back gate and a conventional front gate. Almost symmetrical characteristics are mea sured for the front and the back gates.