E. Teraoka et al., A BUILT-IN SELF-TEST FOR ADC AND DAC IN A SINGLE-CHIP SPEECH CODEC, IEICE transactions on fundamentals of electronics, communications and computer science, E80A(2), 1997, pp. 339-345
Citations number
9
Categorie Soggetti
Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture","Computer Science Information Systems
Built-in self-test (BIST) has been applied to test an analog to digita
l converter (ADC) and a digital to analog converter (DAC) embedded in
a DSP-core ASIC. The eight performance characteristics of the ADC and
the DAC designed in accordance with the ITU-T recommendations are meas
ured using the BIST. Three of the eight characteristics - the attenuat
ion/frequency distortion, the variation of gain with input level, and
the signal-to-total distortion - have been evaluated and the measured
results have shown good agreement with measured results by conventiona
l tests. In the BIST operation, the DSP-core generates input stimulus
and analyzes output response by control of the self-test program. The
sizes of the self-test program and coefficient data are 822 words of t
he IROM and 384 words of the data ROM, respectively. This area overhea
d is less than 0.5% of total chip area. Test-time by the BIST is reduc
ed to approximately 3.2 seconds, which is one-tenth that of convention
al testing. The mixed-signal DSP-core ASIC is testable with only logic
test equipment. and as a result, test-cost - that is test investment
and test-time - is reduced compared with conventional test methods.