In this paper, an analytic current-voltage model for submicrometer ful
ly-depleted (FD) silicon-on-insulator (SOI) MOSFET's is presented. Thi
s model takes into account the source/drain series resistances which c
an be especially high in thin film SOI devices. The effect of drain in
duced conductivity enhancement is also included, which is important fo
r submicrometer channels. The model is verified by comparison to measu
red SOI I-V characteristics. Good agreement is obtained for SOI film t
hicknesses ranging from 40 to 220 nm and effective channel lengths dow
n to 0.25 mum.