PEAS-I - A HARDWARE SOFTWARE CODESIGN SYSTEM FOR ASIP DEVELOPMENT

This paper describes the current implementation and experimental resul ts of a hardware/software codesign system for ASIP (Application Specif ic Integrated Processor) development: the PEAS-I System. The PEAS-I sy stem accepts a set of application programs written in C language, asso ciated data set, module database, and design constraints such as chip area and power consumption. The system then generates an optimized CPU core design in the form of an HDL as well as a set of application pro gram development tools such as a C compiler, an assembler and a simula tor. Another important feature of the PEAS-I system is that the system is able to give accurate estimations of chip area and performance bef ore the detailed design of the ASIP is completed. According to the exp erimental results, the PEAS-I system has been found to be highly effec tive and efficient for ASIP development.