CHARACTERIZATION OF INTRINSIC A-SI-H IN P-I-N DEVICES BY CAPACITANCE MEASUREMENTS - THEORY AND EXPERIMENTS

A technique has been developed for characterizing the intrinsic layer in a-Si:H p-i-n structures. The method is based on the measurement of the differential capacitance under forward bias, i.e., with injection of free carriers in the intrinsic layer. In these conditions, capacita nce is extremely dependent on charges trapped in the band-gap defects. Measurements were performed on several p-i-n samples, in a wide range of frequencies and voltages. All the samples showed the same trend: C apacitance diminished with increasing signal frequency and increased w ith forward applied voltage. An analytical model explains the obtained behavior. In particular, the model shows that the band-tail contribut ion to capacitance decreases slowly with frequency, while deeper defec ts are effective only below 100 Hz. At higher frequencies, trapping ph enomena play a lesser and lesser role in the measurement while depleti on charge becomes relevant and the measured capacitance tends to its a symptotic junction value (i.e., the ratio dielectric constant/thicknes s of the p-i-n). The model predicts a high sensitivity to defect distr ibution in the gap of the intrinsic layer, thus allowing an effective characterization of the semiconductor material as is in the actual dev ice. Up to 10(17) cm(-3) defects have been detected via the capacitanc e technique, presumably located in the portion of the intrinsic layer closest to the p/i interface. The origin of such a large amount of def ects can be related to the presence of inhomogeneities due to the inte rfaces in the p-i-n device. These defects behave as free-carrier traps , and do not affect the recombination mechanism. A picture of the elec tronic defect distribution in the device material is finally proposed which accounts for both midgap neutral dangling bonds and shallower ch arged defects.