SIMULATION OF TRANSIENT SELF-HEATING DURING POWER VDMOS TRANSISTOR TURN-OFF

Authors
HU ZR MAWBY PA TOWERS MS BOARD K
Citation
Zr. Hu et al., SIMULATION OF TRANSIENT SELF-HEATING DURING POWER VDMOS TRANSISTOR TURN-OFF, International journal of electronics, 77(4), 1994, pp. 525-534
Citations number
14
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
International journal of electronics → ACNP
ISSN journal
00207217
Volume
77
Issue
4
Year of publication
1994
Pages
525 - 534
Database
ISI
SICI code
0020-7217(1994)77:4<525:SOTSDP>2.0.ZU;2-2
Abstract
Transient thermal behaviour during power VDMOS transistor turn-off, ba sed on a rigorous thermodynamic treatment, is presented. Time-varying interior lattice temperature distributions due to the power dissipatio n within the device are calculated by solving, self-consistently, the fully-coupled quasi-static Poisson's equation and electron transient c ontinuity equation together with the transient heat flow equation. To make the transient thermal simulation more robust, a new analytical ex pression for heat capacity is used.