REALISTIC TESTABILITY ESTIMATES FOR CMOS ICS

Authors
DALPASSO M FAVALLI M OLIVO P TEIXEIRA JP
Citation
M. Dalpasso et al., REALISTIC TESTABILITY ESTIMATES FOR CMOS ICS, Electronics Letters, 30(19), 1994, pp. 1593-1595
Citations number
7
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Electronics Letters → ACNP
ISSN journal
00135194
Volume
30
Issue
19
Year of publication
1994
Pages
1593 - 1595
Database
ISI
SICI code
0013-5194(1994)30:19<1593:RTEFCI>2.0.ZU;2-D
Abstract
Assessing the testability of high-quality digital ICs requires conside ration of the most likely physical defects and their likelihood of occ urrence, thus enhancing the accuracy of test length estimates for BIST .