OPTOELECTRONIC BUTTERFLY INTERCONNECTION ARCHITECTURE OF MODIFIED SIGNED-DIGIT ARITHMETIC SYSTEMS - FULLY PARALLEL ADDER AND SUBTRACTER

The carry-free property of modified signed-digit addition is discussed , and a space-position-logic-encoding scheme is proposed, which not on ly makes best use of the convenience of binary (0, 1) logic operation but is also suitable for the trinary (1, 0, (1) over bar) property of modified signed-digit digits. Based on the space-position-logic-encodi ng scheme, a fully parallel modified signed-digit adder and subtracter is built by use of optoelectronic switch modules and butterfly interc onnections; thus an effective combination of a parallel algorithm and a parallel architecture is implemented. The effectiveness of this arch itecture is verified by both simulation and experimental results. Key words: Butterfly interconnection, space position-logic encoding, fully parallel modified signeddigit adder and subtracter.