SHALLOW BURIED-CHANNEL GATED BJT ON TFSOI SUBSTRATE

The gated BJT structure is inherently suitable for SOI BiCMOS technolo gy. However, being a surface channel device, it suffers higher noise a nd degraded carrier transport. Ln this study, a novel shallow buried c hannel design on TFSOI is proposed. Devices with various geometries ha ve been fabricated with a simple CMOS-compatible process. These device s have low turn-on voltage, ideal BJT I-V characteristics with current gain higher than 1000, and a maximum transconductance of 290 mS/mm fo r a 0.5 mu m channel length and 15 nm gate oxide. Careful measurements show that an or der of magnitude improvement in noise performance can be expected from the buried channel operation. These devices are suit able for various BiCMOS applications.