HIGH-ACCURACY CIRCUITS FOR ON-CHIP CAPACITANCE RATIO TESTING OR SENSOR READOUT

Authors
Citation
Ym. Cao et Gc. Temes, HIGH-ACCURACY CIRCUITS FOR ON-CHIP CAPACITANCE RATIO TESTING OR SENSOR READOUT, IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 41(9), 1994, pp. 637-639
Citations number
6
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
10577130
Volume
41
Issue
9
Year of publication
1994
Pages
637 - 639
Database
ISI
SICI code
1057-7130(1994)41:9<637:HCFOCR>2.0.ZU;2-E
Abstract
Novel CMOS circuits are described for the on-chip measurement of capac itor ratios. They can provide a high-accuracy A/D interface for capaci tive sensors, or allow the precise calibration of switched-capacitor D ACs, amplifiers and other circuits utilizing ratioed capacitors. Vario us structures are proposed and the limitations of their accuracy are a nalyzed. Computer simulations illustrate the operation and verify the anticipated robustness and high accuracy of the system even in the pre sence of nonidealities.