CONSTANT INTEGER MULTIPLICATION USING MINIMUM ADDERS

Citation
Ag. Dempster et Md. Macleod, CONSTANT INTEGER MULTIPLICATION USING MINIMUM ADDERS, IEE proceedings. Circuits, devices and systems, 141(5), 1994, pp. 407-413
Citations number
9
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
13502409
Volume
141
Issue
5
Year of publication
1994
Pages
407 - 413
Database
ISI
SICI code
1350-2409(1994)141:5<407:CIMUMA>2.0.ZU;2-Z
Abstract
A new method of formulating constant integer multiplication is present ed. It requires fewer adders in general than a canonic signed-digit (C SD) representation; Graphs are used to illustrate multiplier implement ation. A general suboptimal algorithm for the design of multipliers of any wordlength is presented. For 32-bit welds, it achieves an average improvement of 26.6% over CSD. Rules for the generation of graphs wit h the minimum number of adders and subtractors are presented. An exhau stive search algorithm using these rules is described, and applied for wordlengths up to 12 bits. For 12-bit words, it was found that an ave rage improvement of 16% over CSD is achievable.