AN SOI-DRAM WITH WIDE OPERATING VOLTAGE RANGE BY CMOS SIMOX TECHNOLOGY/

An SOI-DRAM test device (64-Kb scale) with 100-nm-thick SOI film has b een fabricated in 0.5-mu m CMOS/SIMOX technology and the basic DRAM fu nction has been successfully observed. A partially depleted transistor was used to solve the floating-body effect, resulting in improved ope ration. The newly introduced body-synchronized sensing scheme enhances the lower V-cc margin. The p-n junction capacitance between source/dr ain and a substrate for SOI structure is reduced by 25%. RAS access ti me tRAC is 70 ns with a 2.7-V power supply, which is as fast as the eq uivalent bulk-Si device with a 4-V power supply. The active current co nsumption is 1.1 mA (V-cc = 3.0 V, 260-ns cycle) for this SOI-DRAM, wh ich is a reduction of 65%, compared with 3.2 mA for the reference bulk -Si DRAM. The mean value of data retention time for this chip at 80 de grees C is longer than 20 s (V-cc = 3.3 V), which is the same value as mass-produced 16-Mb DRAM's. The SOI-DRAM has an operating V-cc range from 2.3 V to 4.0 V. The observed speed enhancement and the wide opera ting voltage range indicate high performance at the low voltage operat ion suitable for battery-operated DRAM's.