A 256-MB DRAM WITH 100-MHZ SERIAL I O PORTS FOR STORAGE OF MOVING-PICTURES/

Authors
KOTANI H AKAMATSU H NAITO Y FUJII T IWATA T TSUJI T ITOH Y SHIMIZU N HIRASE J SHIBATA Y YAMASHITA K HORI T FUJITA T
Citation
H. Kotani et al., A 256-MB DRAM WITH 100-MHZ SERIAL I O PORTS FOR STORAGE OF MOVING-PICTURES/, IEEE journal of solid-state circuits, 29(11), 1994, pp. 1310-1316
Citations number
8
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
IEEE journal of solid-state circuits → ACNP
ISSN journal
00189200
Volume
29
Issue
11
Year of publication
1994
Pages
1310 - 1316
Database
ISI
SICI code
0018-9200(1994)29:11<1310:A2DW1S>2.0.ZU;2-I
Abstract
A 256-Mb DRAM with refresh-free-FIFO function for storage of moving pi ctures has been developed using 0.25-mu m CMOS technology. An operatin g current of 73 mA (reduction of 52% compared with a conventional circ uit) has been achieved at 100 MHz based on introducing (1) a suppresse d High(H)-level differential data transfer scheme which can be operate d at 0.6 V, (2) a new pre-charge method which features a 1/2 VCC prech arge level in read cycle and VSS pre-charge level in write cycle, and (3) a divided operation of array circuits for serial access.