A 3.84-GIPS INTEGRATED MEMORY ARRAY PROCESSOR WITH 64 PROCESSING ELEMENTS AND A 2-MB SRAM

An Integrated Memory Array Processor (IMAP) ULSI with 64 processing el ements and a 2-Mb SRAM has been developed for image processing. The ch ip attains a 3.84 GIPS peak performance through the use of SIMD parall el processing and a 1.28 GByte/s on-chip processor-memory bandwidth. T he IMAP is capable of parallel indirect addressing, which increases ap plications for parallel algorithms Large power consumption with the wi de memory bandwidth is avoided by reducing the number of active sense amplifiers and adopting dynamic power control. Fabricated with a 0.55- mu m BiCMOS double layer metal process technology, the IMAP contains 1 1 million transistors in a 15.1 x 15.6 mm(2) die area.