A QUANTITATIVE METHODOLOGY FOR RAPID PROTOTYPING AND HIGH-LEVEL SYNTHESIS OF SIGNAL-PROCESSING ALGORITHMS

This paper introduces a systematic quantitative methodology to prototy pe deterministic recursive DSP algorithms onto multiple programmable s ignal processors. A scheduling framework that is based upon linear int eger programming techniques is used to obtain rate, processor, delay, and communications optimal schedules for a given data flow graph repre sentation of a signal processing algorithm. This powerful design synth esis environment facilitates optimal scheduling for randomly connected heterogeneous systems with multiple pipelined functional units and fi nite resources in VLSI. This framework can also be used in the high-le vel synthesis of efficient register-transfer level (RTL) VLSI descript ions from behavioral specifications.