STUDIES OF EOS SUSCEPTIBILITY IN 0.6-MU-M NMOS ESD I O PROTECTION STRUCTURES/

The electrical overstress (EOS) susceptibility of ESD I/O protection s tructures needs to be investigated to assure overall EOS/ESD reliabili ty in advanced processes. In this paper, the EOS resistance of 0.6 mu m nMOS ESD protection structures is analyzed in terms of experimental data, failure analysis results and, device-level electrothermal simula tions. Thermally induced EOS failures are explained in terms of physic al phenomena leading to thermal runaway. Device width and contact-to-g ate spacing are shown to directly affect the EOS robustness of the pro tection devices.