A LOW-POWER 12-B ANALOG-TO-DIGITAL CONVERTER WITH ON-CHIP PRECISION TRIMMING

Citation
M. Dewit et al., A LOW-POWER 12-B ANALOG-TO-DIGITAL CONVERTER WITH ON-CHIP PRECISION TRIMMING, IEEE journal of solid-state circuits, 28(4), 1993, pp. 455-461
Citations number
7
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
28
Issue
4
Year of publication
1993
Pages
455 - 461
Database
ISI
SICI code
0018-9200(1993)28:4<455:AL1ACW>2.0.ZU;2-7
Abstract
The design and performance of a 12-b charge redistribution analog-to-d igital converter (ADC) is described. The architecture is chosen to min imize power dissipation. Die area is minimized by a modified self-cali bration algorithm and nonvolatile memory based on polysilicon fuses. T he ADC is fabricated in a 1-mum CMOS process. It converts at a 200-kHz rate with a power dissipation of 10 mW.