VARIABLE VCC DESIGN TECHNIQUES FOR BATTERY-OPERATED DRAMS

Citation
Sm. Yoo et al., VARIABLE VCC DESIGN TECHNIQUES FOR BATTERY-OPERATED DRAMS, IEEE journal of solid-state circuits, 28(4), 1993, pp. 499-503
Citations number
5
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
28
Issue
4
Year of publication
1993
Pages
499 - 503
Database
ISI
SICI code
0018-9200(1993)28:4<499:VVDTFB>2.0.ZU;2-5
Abstract
Wide-voltage-range DRAM's with extended data retention are desirable f or battery-operated or portable computers and consumer devices. This p aper describes the techniques required to obtain wide operation, funct ionality, and performance of standard DRAM's from 1.8 V (2 NiCd or Alk aline batteries) to 3.6 V (upper end of LVTTL standard). Specific tech niques shown are: 1) a low-power and low-voltage reference generator f or detecting V(CC) level; 2) compensation of dc generators, V(BB) and V(PP). for obtaining high speed at reduced voltages; 3) a static word- line driver and latch-isolation sense amplifier for reducing operating current; and 4) a programmable V(CC) variable self-refresh scheme for obtaining maximum data retention time over a full operating range. A sub-50-ns access time is obtained for a 16M DRAM (2M x 8) by simulatio n.