HIGH-SPEED SOI BIPOLAR-TRANSISTORS USING BONDING AND THINNING TECHNIQUES

We propose a high-speed SOI bipolar transistor fabricated using bondin g and thinning techniques. It is important to replace SOI area except for devices with thick SiO2 to reduce parasitic capacitance. A thin SO I film with a thin buried layer helps meet this requirement. We formed a 1-mum-thick SOI film with a 0.7-mum-thick buried layer by ion impla ntation before wafer bonding pulse-field-assisted bonding and selectiv e polishing. Devices were completely isolated by thick SiO2 using a th in SOI film and the LOCOS process. We fabricated epitaxial base transi stors (EBTs) on bonded SOI. Our transistors had a cutoff frequency of 32 GHz.