EXECUTABLE REQUIREMENTS AND SPECIFICATIONS

Traditionally, the detailed form, function, cost and features desired for an electronic system are established in a set of requirements docu ments. Misinterpretation, omissions, and errors in these documents are often significant factors in slowing development of signal processing systems. A requirement which is written in a formally defined compute r executable, rather than a natural, language provides an unambiguous description which can be tested for errors. The VHSIC hardware descrip tion language (VHDL) was used to write an executable requirement which described both required function and interface timing for a real-time signal processor. The executable requirement and a traditional writte n description were given to two developers who created processor proto types. In addition to the prototypes, they produced executable specifi cations of their implementations in the form of a VHDL simulation. The use of VHDL was advantageous because it spanned all abstraction level s from requirements to synthesizable code for ASICs. However, VHDL is not a complete solution because it cannot be used to specify all categ ories of requirements. Based on the experience described in this paper , recommendations for efficient use of VHDL for these purposes and for further work in the area of executable requirements and specification s are presented.