MODEL-YEAR ARCHITECTURES FOR RAPID PROTOTYPING

Citation
J. Pridmore et al., MODEL-YEAR ARCHITECTURES FOR RAPID PROTOTYPING, Journal of VLSI signal processing systems for signal, image, and video technology, 15(1-2), 1997, pp. 83-96
Citations number
4
Categorie Soggetti
Computer Sciences, Special Topics","Engineering, Eletrical & Electronic","Computer Science Information Systems
ISSN journal
13875485
Volume
15
Issue
1-2
Year of publication
1997
Pages
83 - 96
Database
ISI
SICI code
1387-5485(1997)15:1-2<83:MAFRP>2.0.ZU;2-9
Abstract
The Rapid Prototyping of Application-Specific Signal Processors (RASSP ) program is changing the way engineers design embedded signal process ors by providing a process that will reduce by at least a factor of fo ur both the time-to-market and cost, and improve design quality. To ac hieve these improvements, Lockheed Martin's Advanced Technology Labora tories (ATL) is using a methodology that stresses hardware and softwar e reuse, and model-year architectures that enable interoperability and upgrades through open interface standards. This paper describes ATL's model-year architecture, which defines a framework for reuse to enabl e low-cost technology upgrades for embedded processors. This approach can be applied to a wide range of military and commercial applications .