SYSTEMATIC DESIGN OF PIPELINED RECURSIVE FILTERS

Systematic design of pipelined recursive filters is presented. The pro cedure is based on a multiplication algorithm which generates the resu lt most significant digit first. Since the latency of such a multiplie r is low, a reduced number of pipelining delays may be introduced in t he recursion loop. This achieves a high sampling rate. The design proc edure turns out to be systematic and very easy to apply. The implement ation so obtained exhibits minimum hardware and insures minimum latenc y. It is worth noting that its flexibility allows, on one hand, to cho osing freely the number system radix and, on the other hand, interleav ing two multiplier arrays into one. This is illustrated in this paper by the realization of a second order all-pole filter, operating in rad ix-4 representation and using only one array to perform two multiplica tions. By this way, long interconnections are avoided and denser and m ore regular layout is achieved. It turns out that the design procedure may also be applied successfully to various types of realizations whe re multiplications are required.