INTERFACE STATE ANALYSIS USING INTEGRATED ROOM-TEMPERATURE GATED PHOTOLUMINESCENCE

A gated room temperature integrated photoluminescence (PL) technique f or estimating interface state densities in III-V metal-insulator-semic onductor (MIS) structures is described. The use of gated low temperatu re spectral PL has already been demonstrated to be more sensitive than conventional 1 MHz capacitance-voltage (C-V) measurements. Room tempe rature integrated PL was measured on InP MIS structures and interface state densities of approximately 10(12) (cm2 eV)-1 were calculated, si milar to those reported earlier. Furthermore, the elimination of spect roscopic and cryogenic equipment makes this technique simpler and more cost effective than the spectral method, more comparable to C-V measu rements.