SPARCLE - AN EVOLUTIONARY PROCESSOR DESIGN FOR LARGE-SCALE MULTIPROCESSORS

Citation
A. Agarwal et al., SPARCLE - AN EVOLUTIONARY PROCESSOR DESIGN FOR LARGE-SCALE MULTIPROCESSORS, IEEE MICRO, 13(3), 1993, pp. 48-61
Citations number
20
Categorie Soggetti
Computer Sciences","Computer Applications & Cybernetics
Journal title
ISSN journal
02721732
Volume
13
Issue
3
Year of publication
1993
Pages
48 - 61
Database
ISI
SICI code
0272-1732(1993)13:3<48:S-AEPD>2.0.ZU;2-7
Abstract
Working jointly at MIT, LSI Logic, and Sun Microsystems, designers cre ated the sparcle processing chip by evolving an existing RISC architec ture toward a processor suited for large-scale multiprocessors. This c hip supports three multiprocessor mechanisms: fast context switching, fast, user-level message handling, and fine-grain synchronization. The Sparcle effort demonstrates that RISC architectures coupled with a co mmunications and memory management unit do not require major architect ural changes to support multiprocessing efficiently.