THE CYDRA-5 MINISUPERCOMPUTER - ARCHITECTURE AND IMPLEMENTATION

Authors
BECK GR YEN DWL ANDERSON TL
Citation
Gr. Beck et al., THE CYDRA-5 MINISUPERCOMPUTER - ARCHITECTURE AND IMPLEMENTATION, Journal of supercomputing, 7(1-2), 1993, pp. 143-180
Citations number
13
Categorie Soggetti
Computer Sciences","Engineering, Eletrical & Electronic","Computer Applications & Cybernetics
Journal title
Journal of supercomputing → ACNP
ISSN journal
09208542
Volume
7
Issue
1-2
Year of publication
1993
Pages
143 - 180
Database
ISI
SICI code
0920-8542(1993)7:1-2<143:TCM-AA>2.0.ZU;2-F
Abstract
The Cydra 5 exploited both fine-grained and coarse-grained parallelism for a broad class of compute-intensive tasks. It utilized a unique ar chitecture designed for efficient compilation and execution of inner l oops, as well as parallel execution of nonloop code. We discuss the ar chitecture and implementation of the numeric processor and its associa ted high-bandwidth memory system as well as attributes of the overall system.