The pRAM (probabilistic RAM) is a nonlinear stochastic device with neu
ron-like behavior. The pRAM is realizable in hardware and the third ge
neration VLSI pRAM chip is described here. This chip is adaptive since
learning algorithms have been incorporated on-chip, using reinforceme
nt training. The pRAM chip is also adaptive with respect to the interc
onnections between neurons. Results achieved from a small net of pRAM'
s performing a pattern-recognition task using reinforcement training a
re presented.