SILICON RETINA WITH CORRELATION-BASED, VELOCITY-TUNED PIXELS

Authors
Citation
T. Delbruck, SILICON RETINA WITH CORRELATION-BASED, VELOCITY-TUNED PIXELS, IEEE transactions on neural networks, 4(3), 1993, pp. 529-541
Citations number
37
Categorie Soggetti
Computer Application, Chemistry & Engineering","Engineering, Eletrical & Electronic","Computer Applications & Cybernetics
ISSN journal
10459227
Volume
4
Issue
3
Year of publication
1993
Pages
529 - 541
Database
ISI
SICI code
1045-9227(1993)4:3<529:SRWCVP>2.0.ZU;2-R
Abstract
I report the first functional two-dimensional silicon retina that comp utes a complete set of local direction-selective outputs. The chip mot ion computation uses unidirectional delay lines as tuned filters for m oving edges. Photoreceptors detect local changes in image intensity, a nd the outputs from these photoreceptors are coupled into the delay li ne, where they propagate with a particular speed in one direction. If the velocity of the moving edges matches that of the delay line, then the signal on the delay line is reinforced. The output of each pixel i s the power in the delay fine signal, computed within each pixel. This power computation provides the essential nonlinearity for velocity-se lectivity. The delay line architecture differs from the usual pairwise correlation models in that motion information is aggregated over an e xtended spatiotemporal range. As a result, the detectors are sensitive to motion over a wide range of spatial frequencies. I have designed a nd tested functional one- and two-dimensional silicon retinas with dir ection-selective, velocity-tuned pixels. A velocity-selective detector requires only a single delay element and nonlinearity for each tuned velocity, and is sensitive to both light and dark contrasts. The use o f adaptive photoreceptors and compact circuits makes for a well-condit ioned input signal and small circuit offsets, resulting in robust oper ation. All circuits work in subthreshold, resulting in low power consu mption. Pixels with three hexagonal directions of motion selectivity a re approximately (225 mum)2 area in a 2-mum CMOS technology, and consu me less than 5 muW of power.