CONSTANT-G(M) RAIL-TO-RAIL COMMON-MODE RANGE INPUT STAGE WITH MINIMUMCMRR DEGRADATION

In this paper the inherent drawbacks associated with CMOS amplifiers w ith rail-to-rail input common-mode range (CMR) are addressed. It is sh own how they impact on the amplifier and limit its performance. An inp ut stage, suitable to be incorporated on the design of any amplifier t opology with extended input range, is introduced. By controlling the b ias current level as function of the input common-mode voltage, it pro vides simultaneously an almost constant total transconductance and ove r 18 dB of common-mode rejection ratio (CMRR) improvement in regard to the classical approach with just 5 V of total supply voltage. Experim ental results obtained from the evaluation of a prototype chip fabrica ted in a standard CMOS p-well process with 2-mum feature size are give n.