DESIGN FOR RELIABILITY - THE MAJOR CHALLENGE FOR VLSI

Historically, much emphasis has been focussed on the development and u se of computer aids to shorten the IC design synthesis and verificatio n cycle. Little progress has been made in developing computer aided de sign tools in other phases of the product design and manufacturing cyc le. Device scaling for advanced VLSI circuits has created tough reliab ility problems. As a result, the debug and reliability qualification p hase is longer than the design synthesis phase. In this paper, selecte d reliability issues will be discussed within the context of the desig n-in reliability concept.