A CMOS power buffer suitable for video applications is discussed. The
use of a high-speed push-pull output stage and a highly linear high-sp
eed driver allows good linearity to be maintained even with very high
input frequencies. Indeed, total harmonic distortions (THD's) as good
as -66 and -58 dB are achieved at 0.5 and 1 MHz, respectively, with a
load resistance of 75 OMEGA. The integrated prototype, realized using
a 1.2-mum CMOS process, occupies a silicon area of 280 mils2.