VIDEO CMOS POWER BUFFER WITH EXTENDED LINEARITY

Citation
G. Caiulo et al., VIDEO CMOS POWER BUFFER WITH EXTENDED LINEARITY, IEEE journal of solid-state circuits, 28(7), 1993, pp. 845-848
Citations number
6
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
28
Issue
7
Year of publication
1993
Pages
845 - 848
Database
ISI
SICI code
0018-9200(1993)28:7<845:VCPBWE>2.0.ZU;2-G
Abstract
A CMOS power buffer suitable for video applications is discussed. The use of a high-speed push-pull output stage and a highly linear high-sp eed driver allows good linearity to be maintained even with very high input frequencies. Indeed, total harmonic distortions (THD's) as good as -66 and -58 dB are achieved at 0.5 and 1 MHz, respectively, with a load resistance of 75 OMEGA. The integrated prototype, realized using a 1.2-mum CMOS process, occupies a silicon area of 280 mils2.