J. Oehm et K. Schumacher, QUALITY ASSURANCE AND UPGRADE OF ANALOG CHARACTERISTICS BY FAST MISMATCH ANALYSIS OPTION IN NETWORK ANALYSIS ENVIRONMENT, IEEE journal of solid-state circuits, 28(7), 1993, pp. 865-871
In contrast to digital circuits, the fabrication tolerance of electric
al characteristics of analog integrated circuits depends highly on the
local device matching accuracy. Especially for scaled structures down
to the submicrometer range, the local statistical device parameter mi
smatching increases rapidly. As in network analysis programs (i.e., SP
ICE), statistical mismatch effects are not represented within the impl
emented device modeling; consequently no analysis options are availabl
e to compute their influence on electrical circuit characteristics in
production. For quality assurance of analog characteristics in fabrica
tion, fast analysis methods have been developed and placed on programs
of the SPICE family using MOS mismatch modeling based on experiences
reported by Pelgrom et al., Lakshmikumar et al., and own completions i
n view of connections between local and global process variations. Sim
ulation methods and simulated yield statistics in comparison to measur
ements of fabricated analog applications are reported. In general, for
the development of analog circuitry with regard to yield the given ex
amples demonstrate the fundamental need of having statistical mismatch
analysis options within the network analysis environment.