ACCELERATED DYNAMIC LEARNING FOR TEST PATTERN GENERATION IN COMBINATIONAL-CIRCUITS

Authors
Citation
W. Kunz et Dk. Pradhan, ACCELERATED DYNAMIC LEARNING FOR TEST PATTERN GENERATION IN COMBINATIONAL-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 12(5), 1993, pp. 684-694
Citations number
12
Categorie Soggetti
Computer Application, Chemistry & Engineering","Computer Applications & Cybernetics
ISSN journal
02780070
Volume
12
Issue
5
Year of publication
1993
Pages
684 - 694
Database
ISI
SICI code
0278-0070(1993)12:5<684:ADLFTP>2.0.ZU;2-V
Abstract
In the past, dynamic learning has been shown to be useful to obtain hi gh fault coverages when generating test vectors for single stuck-at fa ults in combinational circuits. This work proposes a more efficient te chnique to perform dynamic learning, which we call ''Oriented Dynamic Learning.'' Instead of performing learning for almost all signals in t he circuit, we show that it is possible to determine a subset of these signals to which all learning operations can be restricted. It is sho wn that learning for this set of signals is sufficient to provide the same knowledge about the nonsolution areas in the decision tree, as ga ined by dynamic learning of SOCRATES. We will achieve high efficiency by limiting learning to certain ''Learning Lines'' that lie within a c ertain area of the circuit, called the ''Active Area.'' We present exp erimental results to show that oriented dynamic learning is far more e fficient than dynamic learning in SOCRATES.