ANALYTICAL ESTIMATION OF VECTOR ACCESS PERFORMANCE IN PARALLEL MEMORYARCHITECTURES

A limiting factor in high performance vector computers is the rate at which data can be moved to and from memory during vector loads and sto res. To increase the bandwidth of vector memory operations several inv estigators have proposed the use of noninterleaved storage mappings, a lso known as storage schemes. This paper describes a new method of ana lyzing the performance of vector references for the class of storage s chemes referred to as XOR schemes. The proposed measure of relative pe rformance, the variability of an access, is defined and its computatio n is outlined. The use of variability as a performance indicator is de monstrated and compared with performance measurements made using simul ation. One of the key aspects of the variability measure is its capabi lity to lend insight to the transient behavior of vector accesses.