A UNIVERSAL PARALLEL COMPUTER ARCHITECTURE

Advances in interconnection network performance and interprocessor int eraction mechanisms enable the construction of fine-grain parallel com puters in which the nodes are physically small and have a small amount of memory. This class of machines has a much higher ratio of processo r to memory area and hence provides greater processor throughput and m emory bandwidth per unit cost relative to conventional memory-dominate d machines. This paper describes the technology and architecture trend s motivating fine-grain architecture and the enabling technologies of high-performance interconnection networks and low-overhead interaction mechanisms. We conclude with a discussion of our experiences with the J-Machine, a prototype fine-grain concurrent computer.