The electronic architecture and dynamic signal processing capabilities
of an artificial dendritic tree that can be used to process and class
ify dynamic signals is described. The electrical circuit architecture
is modeled after neurons that have spatially extensive dendritic trees
. The artificial dendritic tree is a hybrid VLSI circuit and is sensit
ive to both temporal and spatial signal characteristics. It does not u
se the conventional neural network concept of weights, and as such it
does not use multipliers, adders, look-up-tables, microprocessors; or
other complex computational units to process signals. The weights of c
onventional neural networks, which take the form of numerical, resisti
ve, voltage, or current values, but do not have any spatial or tempora
l content, are replaced with connections whose spatial location have b
oth a temporal and scaling significance.