A 16X16 SWITCH ELEMENT FOR 1.2-GBIT S IN 0.8-MU-M BICMOS TECHNOLOGY/

The paper describes a monolithic integrated matrix chip with 16 inputs and 16 outputs. Time division signals with bit rates of up to 1.24 Gb it/s can be applied to each of these inputs and outputs. The time divi sion signals comprise 8 channels of 155 Mbit/s and the channels are ne sted bit by bit. The 1.24 Gbit/s input signals are regenerated by ampl itude and in phase and are placed in parallel. Within the chip, the si gnal can be switched channel by channel at the 155 Mbit/s level. The s ignals are then serialized to 1.24 Gbit/s. To aid implementation, bipo lar technology is incorporated in the high speed part and CMOS technol ogy is incorporated in the 155 Mbit/s part. The functions of the chip are described and some applications, such as its use in an ATM switch network, will be mentioned. First samples of the chip are already avai lable. The descriptions refer to simulation results and measurements t aken from first samples.